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Micrel, Inc.
Clock Generation
The MICRF507’s crystal oscillator:
MICRF507
Figure 6 shows the oscillator with its frequency-shifting
?
?
?
Serves as the reference for the synthesizer that is
the carrier and local oscillator source.
Is divided down to clock the switched-capacitor IF
filter.
Is divided down to generate three other clocks: bit
rate clock, bit synchronization clock, and
modulator clock
capacitor bank (controlled by the register field XCOtune)
and the frequency dividers that derive the latter three
clocks from its output. This division occurs in two stages.
First, the XCO output is divided by the 6-bit field Refclk_K,
which has allowable values between 1 and 63. Then, for
each of the three clocks, another field (BitSync_clkS,
BitRate_ClkS, and ModClkS, respectively) selects the
number of further divisions by 2. Complete relationships of
field values and resultant frequencies are given below for
each clock.
Field Name
XCOtune
RefClk_K
BitRate_clkS
Mod_clkS
Number
of bits
5
6
3
3
Location
of bits
Reg9[4:0]
Reg7[5:0]
Reg6[0],
Reg7[7:6]
Reg6[6:4]
Description
Crystal oscillator trimming.
Reference clock divider.
Transmitter Bit rate clock setting. See Figure 9 and “Data
Interface and Bit Synchronization” section for more details.
VCO Modulator clock setting, set the modulator clock to
either 8x or 16x the bit rate clock.
Receiver Bit Synchronization clock setting, always set bit
BitSync_clkS
3
Reg6[3:1]
synchronization clock to 16x the bit rate clock. See Figure 9
and “Data Interface and Bit Synchronization” section for more
details.
Table 3. Register Bit Fields for Clock Generation
Figure 6. MICRF507 Clock Sources
October 2, 2013
15
Revision 2.2
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